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Approver | [Not Completed] |
Due date | -- |
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Standard boost converter layout, swapping diode for GANFET on node from inductor to battery, which is a pretty standard edit.
Option 1: Boost | Option 2: Zeta | Option 3: Resonance | ||||||||||||||
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Overview | Design already implemented, and tested so kinks are worked out. Only capable of boosting, and has a generally lower efficiency than other two options. | Capable of boosting or bucking, very standard circuit layout that wouldn’t take too much messing around to make work. Generally higher efficiency and smaller passive components than boost converter. | Can implement ZVS or “soft switching” which is intended to reduce or eliminate switching losses. Probably most efficient design, but only has this efficiency at relatively small input voltage ranges in basic designs. There are slightly more complex versions that can handle large ranges of voltage inputs and maintain efficiency. Dr. Hanson has a really good paper over this which pretty much tells you how to design one of these. | |||||||||||||
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I am going to design the circuit using the resonance converter for now. The only concern that I have is that resonance converters are known to lose efficiency outside of specific input ranges. However the circuit topology I am choosing to use should be capable of maintaining high efficiency at larger input ranges.
I am using LTSpice to simulate the converter with a python library that interfaces with it.
The trickiest part of setting up the simulation is setting duty cycles for the switches since the cycles are somewhat dependent on factors within the converter. However there are only two cycles which are controlled by the user. These are the first two of the six cycles, after which the switches are not touched and all switching occurs in the diodes. The time for the subsequent cycles must be determined with spice. However, there will also be some control circuitry used to optimize the timing of this cycle.
I’m hoping to be able to run the converter at about 2 MHz. Maximizing frequency will allow me to use the smallest passive components possible.
tes = Switch A and B on
tdir = Switch A on, B off
tind = Switch A and B off
tres = resonant reset period (half of switching period)
ex:
tes = 40ns
tdir = 20ns
tind = 20ns
tres = 80ns
period = 160ns
Spice Parameters:
Minimize capacitor values
Maximize frequency
TODO:
Write script to characterize duty cycle and frequency of both operating modes.
Figure out what’s wrong with my sim
Find frequency with max power output. Can probably operate at a much higher frequency than I thought because of the relatively low output voltage compared to the input.
Identical circuits for SA1 and SB1:
The input of the comparator will need to be able to consider 63.2% of the 5v as a signal high so that I can just use the time constant of the RC circuit and not have to mess around with characterization. If this isn’t precise enough I may have to calibrate this manually to get the timing right.
The DAC to generate the V_TMR will need to be very precise since the timing is on the ns scale. A discrete DAC may be preferred over the Nucleos integrated DAC.
I think i’m pretty close to making a layout and printing this board. I may also just make it on a breadboard bc the components are mostly passives that I can control with my MSPM0 microcontroller and read with an oscilloscope.
Check out Dr. Hanson's paper on a ZVS resonance converter design he made:
https://ieeexplore.ieee.org/document/7749103
Good video that explains Zeta Converters:
https://www.youtube.com/watch?v=klcNgH715pkVideo that explains Boost Converter:
https://www.youtube.com/watch?v=9QM55r5fnUk